Seamless design of smart edge processors

HORIZON.2.4HORIZON-RIAID: 101070374
EC Contribution
€84,169
Consortium Size
20 orgs
Summary

With the rise of deep learning (DL), our world braces for Artificial Intelligence (AI) in every edge device, creating an urgent need for edge-AI processing hardware. Unlike existing solutions, this hardware needs to support high throughput, reliable, and secure AI processing at ultra-low power (ULP), with a very short time to market.With its strong legacy in edge solutions and open processing platforms, the EU is ideally positioned to become the leader in this edge-AI market. However, certain roadblocks keep the EU from assuming this leadership role: Edge processors need to become 100x more energy efficient; Their complexity demands automated design with 10x design time reduction; They must be secure and reliable to get accepted; Finally, they should be flexible and powerful to support the DL domain.CONVOLVE addresses these roadblocks and thereby enables EU leadership in Edge-AI. To that end, it will take a holistic approach with innovations at all design stack levels, including:1.ULP memristive circuits for computation-in-memory2.Fast compositional design of System-on-Chips (SoC)3.Transparent compilers supporting automated code optimizations and domain-specific languages4.Rethinking DL models through dynamic neural networks, event-based execution, and sparsity5.On-edge continuous learning for improved accuracy, self-healing, and reliable adaptation to non-stationary environments6.Holistic integration in SoCs supporting secure execution with real-time guaranteesThe CONVOLVE consortium includes some of Europe's strongest research groups and industries, covering the whole design stack and value chain. In a community effort, we will demonstrate Edge-AI computing in real-life vision and audio domains. By combining these innovative ULP and fast design solutions, CONVOLVE will, for the first time, enable reliable, smart, and energy-efficient edge-AI devices at a rapid time-to-market and low cost, and as such open the road for EU leadership in edge-processing.

Consortium (20)

Project Results (72)

Source: CORDIS, the EU research results database.

Publications (52)
A Bespoke Design Approach to Low-Power Printed Microprocessors for Machine Learning Applications
2025 IEEE International Symposium on Circuits and Systems (ISCAS)· 2025DOI
Panagiotis Chaidos, Giorgos Armeniakos, Sotirios Xydis, Dimitrios Soudris
A Multi-level Compiler Backend for Accelerated Micro-kernels Targeting RISC-V ISA Extensions
Proceedings of the 23rd ACM/IEEE International Symposium on Code Generation and Optimization· 2025DOI
Alexandre Lopoukhine, Federico Ficarelli, Christos Vasiladiotis, Anton Lydike, Josse Van Delm, Alban Dutilleul, Luca Benini, Marian Verhelst, Tobias Grosser
Adaptive Slimming for Scalable and Efficient Speech Enhancement
2025 IEEE Workshop on Applications of Signal Processing to Audio and Acoustics (WASPAA)· 2025DOI
Riccardo Miccini, Minje Kim, Clément Laroche, Luca Pezzarossa, Paris Smaragdis
DataMaestro: A Versatile and Efficient Data Streaming Engine Bringing Decoupled Memory Access To Dataflow Accelerators
2025 62nd ACM/IEEE Design Automation Conference (DAC)· 2025DOI
Xiaoling Yi, Yunhao Deng, Ryan Antonio, Fanchen Kong, Guilherme Paim, Marian Verhelst
DREAM-CIM: A Digital SRAM-Based CIM Accelerator for Energy- and Area-Efficient Edge AI
IEEE Transactions on Circuits and Systems for Artificial Intelligence· 2025DOI
Asmae El Arrassi, Lucas Huijbregts, Manil Dev Gomony, Anteneh Gebregiorgis, Francky Catthoor, Mottaqiallah Taouil, Rajiv Joshi, Said Hamdioui
Efficient Streaming Speech Quality Prediction with Spiking Neural Networks
Interspeech 2025· 2025DOI
Mattias Nilsson, Riccardo Miccini, Julian Rossbroich, Clément Laroche, Tobias Piechowiak, Friedemann Zenke
EFLOP: A Sparsity-Aware Metric for Evaluating Computational Cost in Spiking and Non-Spiking Neural Networks
Neuromorphic Computing and Engineering· 2025DOI
Simon Narduzzi, Friedemann Zenke, Shih-Chii Liu, Liza Andrea Dunbar
Multi-Partner Project: Securing Future Edge-AI Processors in Practice (CONVOLVE)
2025 Design, Automation & Test in Europe Conference (DATE)· 2025DOI
Sven Argo, Henk Corporaal, Alejandro Garza, Marc Geilen, Manil Dev Gomony, Tim Güneysu, Adrian Marotzke, Fouwad Mir, Jan Richter-Brockmann, Jeffrey Smith, Mottaqiallah Taouil, Said Hamdioui
OpenGeMM: A Highly-Efficient GeMM Accelerator Generator with Lightweight RISC-V Control and Tight Memory Coupling
Proceedings of the 30th Asia and South Pacific Design Automation Conference· 2025DOI
Xiaoling Yi, Ryan Antonio, Joren Dumoulin, Jiacong Sun, Josse Van Delm, Guilherme Pereira Paim, Marian Verhelst
Scalable Speech Enhancement With Dynamic Channel Pruning
ICASSP 2025 - 2025 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP)· 2025DOI
Riccardo Miccini, Clément Laroche, Tobias Piechowiak, Luca Pezzarossa
SECOMP: Formally Secure Compilation of Compartmentalized C Programs
Proceedings of the 2024 on ACM SIGSAC Conference on Computer and Communications Security· 2025DOI
Jérémy Thibault, Roberto Blanco, Dongjae Lee, Sven Argo, Arthur Azevedo de Amorim, Aïna Linn Georges, Cătălin Hriţcu, Andrew Tolmach
Stream: Design Space Exploration of Layer-Fused DNNs on Heterogeneous Dataflow Accelerators
IEEE Transactions on Computers· 2025DOI
Arne Symons, Linyan Mei, Steven Colleman, Pouya Houshmand, Sebastian Karl, Marian Verhelst
Time-Predictable Deep Noise Suppression on an Edge Device
2025 28th International Symposium on Real-Time Distributed Computing (ISORC)· 2025DOI
Alessandro Cerioli, Tórur Biskopstø Strøm, Clément Laroche, Tobias Piechowiak, Luca Pezzarossa, Martin Schoeberl
xDSL: Sidekick Compilation for SSA-Based Compilers
Proceedings of the 23rd ACM/IEEE International Symposium on Code Generation and Optimization· 2025DOI
Mathieu Fehr, Michel Weber, Christian Ulmann, Alexandre Lopoukhine, Martin Paul Lücke, Théo Degioanni, Christos Vasiladiotis, Michel Steuwer, Tobias Grosser
Alternate Path μ-op Cache Prefetching
2024 ACM/IEEE 51st Annual International Symposium on Computer Architecture (ISCA)· 2024DOI
Sawan Singh, Arthur Perais, Alexandra Jimborean, Alberto Ros
An Empirical Evaluation of Sliding Windows on Siren Detection Task using Spiking Neural Networks
6th International Conference on Advances in Signal Processing and Artificial Intelligence (ASPAI' 2024)· 2024DOI
Shreya Kshirasagar; Andre Guntoro; Christian Mayr
Auditory Anomaly Detection using Recurrent Spiking Neural Networks
2024 IEEE 6th International Conference on AI Circuits and Systems (AICAS)· 2024DOI
Shreya Kshirasagar, Benjamin Cramer, Andre Guntoro, Christian Mayr
Data-driven HLS optimization for reconfigurable accelerators
Proceedings of the 61st ACM/IEEE Design Automation Conference· 2024DOI
Aggelos Ferikoglou, Andreas Kakolyris, Vasilis Kypriotis, Dimosthenis Masouros, Dimitrios Soudris, Sotirios Xydis
Decoding Finger Velocity from Cortical Spike Trains with Recurrent Spiking Neural Networks
2024 IEEE Biomedical Circuits and Systems Conference (BioCAS)· 2024DOI
Tengjun Liu, Julia Gygax, Julian Rossbroich, Yansong Chua, Shaomin Zhang, Friedemann Zenke
Decoupled Access-Execute Enabled DVFS for TinyML Deployments on STM32 Microcontrollers
2024 Design, Automation & Test in Europe Conference & Exhibition (DATE)· 2024DOI
Elisavet Lydia Alvanaki, Manolis Katsaragakis, Dimosthenis Masouros, Sotirios Xydis, Dimitrios Soudris
Dynamic Early Exiting Predictive Coding Neural Networks
· 2024DOI
Alaa Zniber, Ouassim Karrakchou, Mounir Ghogho
Energy Cost Modelling for Optimizing Large Language Model Inference on Hardware Accelerators
2024 IEEE 37th International System-on-Chip Conference (SOCC)· 2024DOI
Robin Geens, Man Shi, Arne Symons, Chao Fang, Marian Verhelst
ESAM: Energy-efficient SNN Architecture using 3nm FinFET Multiport SRAM-based CIM with Online Learning
· 2024DOI
Lucas Huijbregts, Liu Hsiao-Hsuan, Paul Detterer, Said Hamdioui, Amirreza Yousefzadeh, Rajendra Bishnoi
Falcon: A Scalable Analytical Cache Model
Proceedings of the ACM on Programming Languages· 2024DOI
Arjun Pitchanathan, Kunwar Grover, Tobias Grosser
HTVM: Efficient Neural Network Deployment On Heterogeneous TinyML Platforms
2023 60th ACM/IEEE Design Automation Conference (DAC)· 2024DOI
Josse Van Delm, Maarten Vandersteegen, Alessio Burrello, Giuseppe Maria Sarda, Francesco Conti, Daniele Jahier Pagliari, Luca Benini, Marian Verhelst
Late Breaking Results: Language-level QoR modeling for High-Level Synthesis
Proceedings of the 61st ACM/IEEE Design Automation Conference· 2024DOI
Dimosthenis Masouros, Aggelos Ferikoglou, Georgios Zervakis, Sotirios Xydis, Dimitrios Soudris
NeuralCasting: A Front-End Compilation Infrastructure for Neural Networks
2024 11th International Conference on Internet of Things: Systems, Management and Security (IOTSMS)· 2024DOI
Alessandro Cerioli, Riccardo Miccini, Clément Laroche, Tobias Piechowiak, Luca Pezzarossa, Jens Sparsø, Martin Schoeberl
Optimizing Layer-Fused Scheduling of Transformer Networks on Multi-accelerator Platforms
2024 25th International Symposium on Quality Electronic Design (ISQED)· 2024DOI
Steven Colleman, Arne Symons, Victor J.B. Jung, Marian Verhelst
Reliable and Energy-Efficient Diabetic Retinopathy Screening Using Memristor-Based Neural Networks
IEEE Access· 2024DOI
Sumit Diware, Koteswararao Chilakala, Rajiv V. Joshi, Said Hamdioui, Rajendra Bishnoi
Resource-Efficient Speech Quality Prediction through Quantization Aware Training and Binary Activation Maps
Interspeech 2024· 2024DOI
Mattias Nilsson, Riccardo Miccini, Clement Laroche, Tobias Piechowiak, Friedemann Zenke
Synthetic data generation techniques for training deep acoustic siren identification networks
Frontiers in Signal Processing· 2024DOI
Stefano Damiano; Benjamin Cramer;Andre Guntoro; Toon van Waterschoot
Towards a tailored mixed-precision sub-8-bit quantization scheme for Gated Recurrent Units using Genetic Algorithms
Proceedings of tinyML Research Symposium (tinyML Research Symposium’24)· 2024DOI
Riccardo Miccini, Alessandro Cerioli, Clément Laroche, Tobias Piechowiak, Jens Sparsø, Luca Pezzarossa
Verifying Peephole Rewriting In SSA Compiler IRs
· 2024DOI
Siddharth Bhat, Alex Keizer, Chris Hughes, Andres Goens and Tobias Grosser
A Holistic Approach Towards Side-Channel Secure Fixed-Weight Polynomial Sampling
PKC 2023: 26th IACR International Conference on Practice and Theory of Public-Key Cryptography· 2023DOI
Markus Krausz, Georg Land, Jan Richter-Brockmann, Tim Güneysu
ACCO: Automated Causal CNN Scheduling Optimizer for Real-Time Edge Accelerators
"""2023 IEEE 41st International Conference on Computer Design (ICCD) """· 2023DOI
Jun Yin, Linyan Mei, Andre Guntoro, Marian Verhelst
Analog or Digital In-Memory Computing? Benchmarking Through Quantitative Modeling
2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD)· 2023DOI
Jiacong Sun, Pouya Houshmand, Marian Verhelst
CELLO: Compiler-Assisted Efficient Load-Load Ordering in Data-Race-Free Regions
International Conference on Parallel Architectures and Compilation Techniques (PACT)· 2023DOI
S Singh, J Feliu, ME Acacio, A Jimborean, A Ros
Challenges and Opportunities of Security-Aware EDA
ACM Transactions on Embedded Computing Systems· 2023DOI
Jakob Feldtkeller; Pascal Sasdrich; Tim Güneysu
CMDS: Cross-layer Dataflow Optimization for DNN Accelerators Exploiting Multi-bank Memories
2023 24th International Symposium on Quality Electronic Design (ISQED)· 2023DOI
Man Shi; Steven Colleman MICAS-ESAT, KU Leuven ; Charlotte VanDeMieroop; Antony Joseph; Maurice Meijer; Wim Dehaene; Marian Verhelst
COAC: Cross-Layer Optimization of Accelerator Configurability for Efficient CNN Processing
IEEE Transactions on Very Large Scale Integration (VLSI) Systems· 2023DOI
Steven Colleman; Man Shi; Marian Verhelst
Combined Private Circuits - Combined Security Refurbished
ACM Conference on Computer and Communications Security (CCS)· 2023DOI
Jakob Feldtkeller, Tim Güneysu, Thorben Moos, Jan Richter-Brockmann, Sayandeep Saha, Pascal Sasdrich, François-Xavier Standaert
DeFiNES: Enabling Fast Exploration of the Depth-first Scheduling Space for DNN Accelerators through Analytical Modeling
2023 IEEE International Symposium on High-Performance Computer Architecture (HPCA)· 2023DOI
Mei, Linyan; Goetschalckx, Koen; Symons, Arne; Verhelst, Marian
Dependability of Future Edge-AI Processors: Pandora’s Box
2023 IEEE European Test Symposium (ETS)· 2023DOI
Manil Dev Gomony, Anteneh Gebregiorgis, Moritz Fieback, Marc Geilen, Sander Stuijk, Jan Richter-Brockmann, Rajendra Bishnoi, Sven Argo, Lara Arche Andradas, Tim Güneysu, Mottaqiallah Taouil, Henk Corporaal, Said Hamdioui
Differentiable Transportation Pruning
2023 IEEE/CVF International Conference on Computer Vision (ICCV)· 2023DOI
Li, Yunqiang; van Gemert, Jan C.; Hoefler, Torsten; Moons, Bert; Eleftheriou, Evangelos; Verhoef, Bram-Ernst
Dynamic nsNET2: Efficient Deep Noise Suppression with Early Exiting
IEEE International Workshop on Machine Learning for Signal Processing (MLSP 2023)· 2023DOI
Miccini, Riccardo; Zniber, Alaa; Laroche, Clément; Piechowiak, Tobias; Schoeberl, Martin; Pezzarossa, Luca; Karrakchou, Ouassim; Sparsø, Jens; Ghogho, Mounir
Free Bits: Latency Optimization of Mixed-Precision Quantized Neural Networks on the Edge
2023 IEEE 5th International Conference on Artificial Intelligence Circuits and Systems (AICAS)· 2023DOI
Rutishauser, Georg; Conti, Francesco; Benini, Luca
Gadget-based Masking of Streamlined NTRU Prime Decapsulation in Hardware
IACR Transactions on Cryptographic Hardware and Embedded Systems (CHES 2024)· 2023DOI
Adrian Marotzke, Georg Land, Jan Richter-Brockmann, Tim Güneysu
Implicit variance regularization in non-contrastive SSL. Advances in Neural Information Processing Systems
Neurips 22023· 2023DOI
Halvagal, M. S., Laborieux, A., & Zenke, F.
Optimising GPGPU Execution Through Runtime Micro-Architecture Parameter Analysis
2023 IEEE INTERNATIONAL SYMPOSIUM ON WORKLOAD CHARACTERIZATION, IISWC; 2023· 2023DOI
Giuseppe Maria Sarda, Nimish Shah, Debjyoti Bhattacharjee, Peter Debacker, Marian Verhelst
PetaOps/W edge-AI Processors: Myth or reality?
2023 Design, Automation & Test in Europe Conference & Exhibition (DATE)· 2023DOI
Manil Dev Gomony, Floran De Putter, Anteneh Gebregiorgis, Gianna Paulin, Linyan Mei, Vikram Jain, Said Hamdioui, Victor Sanchez, Tobias Grosser, Marc Geilen, Marian Verhelst, Friedemann Zenke, Frank Gurkaynak, Barry De Bruin, Sander Stuijk, Simon Davidson
Quantitative Fault Injection Analysis
Advances in Cryptology – ASIACRYPT 2023· 2023DOI
Jakob Feldtkeller, Tim Güneysu, Patrick Schaumont
SALSA: Simulated Annealing based Loop-Ordering Scheduler for DNN Accelerators
2023 IEEE 5th International Conference on Artificial Intelligence Circuits and Systems (AICAS)· 2023DOI
Victor J.B. Jung, Arne Symons, Linyan Mei, Marian Verhelst, Luca Benini
Deliverables (19)
Other Results (1)
Periodic Reporting for period 1 - CONVOLVE (Seamless design of smart edge processors)